Semiconductor integrated circuit
US7035161B2 · kind B2 · utility
0Cited by
15References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 10, 2003 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | Apr 22, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An I/O interface circuit immediately close to a bank having a plurality of memory cells and an I/O circuit is directly connected to data line pairs via a switching circuit. Another I/O interface circuit is connected to other data line pairs via switching circuits and data bus pairs. Consequently the number of lines of the data bus pairs provided within the chip of the semiconductor integrated circuit is half of the number in the prior art, and the chip area can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.