Method and apparatus for distributed synchronous clocking
US7035269B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2001 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | Sep 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0685
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A method and an apparatus are provided for synchronizing clock signals in spatially distributed nodes in large, synchronous electronic, optical, optoelectronic or wireless systems, such as systems comprising arrays of microprocessors and memories, and telecommunication systems. The nodes comprise a master node and a plurality of slave nodes. The master node generates first and second identical pulse trains and propagates them to the slave nodes via a first and second propagation channels, respectively, so that a pair of pulses, one from each pulse train, arrive at each slave node substantially simultaneously, travelling in opposite directions. Each slave node generates a clock signal event in response to the substantially simultaneous arrival of each pair of pulses. The master node maintains the rate of the two pulse trains such that there are “pN” pulses in each propagation channel at any time, where “N” is the number of nodes and “p” is an integer. Adjustable delays are provided at each slave node, disposed in each propagation channel. When the pulses in the two channels do not arrive simultaneously, the slave node adjusts the delay units so as reduce differences in the arrival t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.