System and method for using multiple working memories to improve microprocessor security
US7036002B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 25, 1998 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | Jun 25, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/755
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An unpredictable microprocessor or microcomputer comprises a processor (1), a first working memory (51), a main memory (6) containing an operating system, a main program (P1) and a secondary program (P2), a second working memory (52), and switching means which, during the performance of the programs, makes it possible to switch from using one of the two working memories (51, 52) to using the other working memory, while preserving their contents. Switching means comprise at least one first block of registers (54) for storing the operating context of the programs in the main memory and a switching circuit (53) for enabling one of the working memories and the access registers (A1–a3) (d1–d3) associated with each memory (51, 52, 6) and controlled by said switching circuit (53).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.