Integrated circuits with at least one layer that has more than one preferred interconnect direction, and method for manufacturing such IC's
US7036105B1 · kind B1 · utility
10Cited by
113References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2002 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | Apr 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Some embodiments of the invention provide an integrated-circuit chip that has a design based on a wiring model that allows at least a particular wiring layer to have more than one preferred wiring directions. Other embodiments provide a method of manufacturing an integrated circuit (“IC”) that has a plurality of wiring layers. The method specifies a layout of the IC by using a wiring model that specifies more than one preferred wiring direction for at least a region of a particular wiring layer. The method then uses the layout to fabricate the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.