System and method for using areas near photo global alignment marks or unpatterned areas of a semiconductor wafer to create structures for SIMS or E-Beam or XRD testing
US7038222B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2004 |
| Grant date | May 2, 2006 |
| Priority date | — |
| Expiry date | Oct 4, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01N23/22
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system and method is described for using areas in or near photo global alignment marks or in or near unpatterned areas of a semiconductor wafer to create structures for secondary ion mass spectroscopy (SIMS) testing or electron beam (E-Beam) testing or X-ray diffraction (XRD) testing of the semiconductor wafer. The present invention makes it possible to obtain wafer level information about the front-end processing of the semiconductor wafers. The SIMS/E-Beam/XRD testing measures characteristics such as the dopant content, thickness variations, and defect density of the wafers. The present invention eliminates the need to build individual test structures within product dies and eliminates the need to build scribe line structures near the product dies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.