Thin film transistor device, method of manufacturing the same and liquid crystal panel
US7038283B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2002 |
| Grant date | May 2, 2006 |
| Priority date | — |
| Expiry date | Mar 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
In a case of a liquid crystal display apparatus, a gate insulating film of a TFT driven at a low voltage (3.3 V or 5 V) is constituted by one insulating film, and a thickness thereof is set to, for example, 30 nm. This TFT has a structure in which LDD regions (low concentration impurity regions) are not provided. A TFT having a CMOS structure, which is driven at a high voltage (18 V), has a gate insulating film constituted by two insulating films having a thickness of, for example, 130 nm in total. In an n-type TFT, a low concentration impurity region is provided on a drain side. A p-type TFT has a structure having no LDD region. A pixel TFT has a gate insulating film constituted by two insulating films, and LDD regions provided in both of its source/drain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.