Sparse refresh double-buffering
US7038689B2 · kind B2 · utility
4Cited by
14References
29Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 19, 2002 |
| Grant date | May 2, 2006 |
| Priority date | — |
| Expiry date | Jul 21, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/04
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A spatial light modulator having a double-buffering pixel value storage mechanism. A double-buffering mechanism enabling sparse refresh. A double-buffering value storage mechanism suitable for use with a serial or raster value producer and a value consumer, especially those in which it is desirable to consume an entire, completed frame or set of values at a time, and particularly those in which it is desirable to enable the producer to continue producing serially while the consumer is consuming in parallel fashion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.