Phase detector and signal locking system controller
US7039148B1 · kind B1 · utility
4Cited by
13References
52Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 2, 2001 |
| Grant date | May 2, 2006 |
| Priority date | — |
| Expiry date | Aug 21, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/089
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase detector and signal locking system controller for use in a digital phase-locked loop (PLL) application includes a first and a second phase detector where the first phase detector result is used to control the initial pull-in and the second phase detector is used to control fine tuning once the phase differences are too small for appropriate detection by the first phase detector. A post processing and control unit operates to effectively merge the two phase detector outputs and to apply the appropriate gain factor that can be used to control a PLL system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.