Method and apparatus for analyzing a source current waveform in a semiconductor integrated circuit
US7039536B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 2001 |
| Grant date | May 2, 2006 |
| Priority date | — |
| Expiry date | Dec 1, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3004
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The invention provides a method of analyzing a source current at a higher speed and an enhanced accuracy in a semiconductor integrated circuit including a digital circuit. The method to analyze a waveform of the source current, with consideration of re-distribution of charges throughout the digital circuit in the semiconductor integrated circuit, expressing the digital circuit with series of parasitic capacitors ΣCch, ↑ (nT) and ΣCch, ↓ (nT) to be charged and connected between the source and the ground lines. The capacitor series are calculated in time series based on the distribution of switching operations of the logic gates included in the digital circuit. An analysis model for determining the waveform of the source current in the digital circuit is obtained by connecting the parasitic capacitor series with a couple of respective parasitic impedances Zd and Zg of the source line and the ground line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.