Calibrating return time with cross-coupled arbiter/delay circuits to compare clock signals
US7039824B2 · kind B2 · utility
26Cited by
5References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2004 |
| Grant date | May 2, 2006 |
| Priority date | — |
| Expiry date | Sep 28, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0682
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Calibrating return time includes determining clock calibration information based on clock signals local to a master device and return clock signals corresponding to each of at least two slave devices, storing clock calibration information with respect to each of the slave devices with which the master device will communicate using a bus, and, after the clock calibration information has been stored, resynchronizing data signals that are received from each of the slave devices based on the corresponding stored clock calibration information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.