Clock system capable of synchronizing clock frequencies of power processing devices and digital signal processing devices
US7043313B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 8, 2000 |
| Grant date | May 9, 2006 |
| Priority date | — |
| Expiry date | Jul 29, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0008
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention synchronizes the clock of the power processing devices and digital signal processing devices in an audio system. The system may include a clock, a digital signal processor (DSP), and a pulse width modulated (PWM) power processing device wherein the digital signal processor and the power processing device would use the clock for their operation. The DSP and the PWM power processing device may use, for operation, the frequency of the clock, or a multiple, integer fraction thereof, such that all clocks are synchronized and all potential sum and/or difference frequencies are predetermined and fall outside the audible frequency range. The may also include a sensor capable of detecting and reporting the clock information either through a metal wire, fiber optic wire, infrared or radio frequency link, which can allow the power processing devices to use the same clock as the DSP.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.