System for memory access in a data processor
US7043618B2 · kind B2 · utility
2Cited by
11References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2002 |
| Grant date | May 9, 2006 |
| Priority date | — |
| Expiry date | Nov 6, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8053
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processor comprising: a register memory comprising an array of memory cells, each cell being addressable by means of an instruction specifying a pair of coordinates that identify the cell in the array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.