Systems and methods for facilitating testing of pads of integrated circuits
US7043674B2 · kind B2 · utility
17Cited by
10References
21Claims
0Family size
Inventors
Key dates
| Filing date | Jun 18, 2003 |
| Grant date | May 9, 2006 |
| Priority date | — |
| Expiry date | Apr 21, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3183
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Methods for testing integrated circuits (ICs) are provided. An embodiment of a method comprises: electrically interconnecting automated test equipment (ATE) with the IC; providing at least one stimulus such that the IC determines the presence of a leakage current of the first pad; and receiving information corresponding to the leakage current of the first pad. Systems also are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.