Method for selecting and placing bypass capacitors on multi-layer printed circuit boards
US7047515B1 · kind B1 · utility
12Cited by
9References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2003 |
| Grant date | May 16, 2006 |
| Priority date | — |
| Expiry date | Dec 10, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09309
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method places bypass capacitors for controlling the signal integrity of a signal routed between devices on a multi-layer printed circuit board by analysis of the routing of the signal and the signal characteristics. In general, when an interconnecting signal between devices is routed adjacent to an impedance control plane that does not serve as the circuit supply voltage plane or the reference voltage plane for all devices interconnected by the signal trace, the method selects locations for addition of bypass capacitors based upon the routing of the interconnecting signal trace to improve signal integrity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.