System and method for adjusting group delay
US7049907B2 · kind B2 · utility
6Cited by
24References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2004 |
| Grant date | May 23, 2006 |
| Priority date | — |
| Expiry date | Jun 17, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/3229
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A group delay adjusting circuit. The group delay adjusting circuit comprises an electronically adjustable variable capacitance, and an electronically variable virtual inductor coupled in parallel to the electronically variable capacitance at a node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.