Integrated circuit with offset pins

US7053480B2 · kind B2 · utility

Assignee

• Micronas GmbH · DE

Inventors

• Wolfgang Hauser · Blankenloch, DE
• Heiko Dreher · Nassau (Lahn), DE
• Christian Kimstedt · Glückstadt, DE
• Markus Rogalla · Bad Krozingen, DE

Key dates

• Filing date: Jul 26, 2002
• Grant date: May 30, 2006
• Expiry date: Jul 26, 2022

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10T29/49222
• WIPO field: Audio-visual technology
• WIPO sector: Electrical engineering

Abstract

The invention relates to the fabrication and testing of a chip with a package (2) having connecting pins (1) as well as to mounting the package (2) on a board (5), whereby in order to combine the advantages of a package (2) with inline connecting pins (1) with the advantages of a package (2) with offset connecting pins (11, 12), the package (2) is fabricated with inline connecting pins (1) and inserted into a test socket (3) for testing. Immediately before mounting on the board (5), at least one connecting pin, preferably every second connecting pin (12), of the package (2) is bent inward by a bending tool (6) so as to achieve an offset arrangement of the connecting pins (11, 12). The package (2) is preferably mounted on the board (5) using the bending tool (6). A simple, inexpensively produced test socket (3) is sufficient for the purpose of testing the chip. An inexpensively produced guide brace (4), for example, is suitable as a packaging means. Since every second connecting pin (12) is not bent inward immediately before insertion of the connecting pins (11,12), no subsequent corrective alignment of the offset connecting pins (11, 12) is required.