Apparatus, system, and method for avoiding data writes that stall transactions in a bus interface
US7054987B1 · kind B1 · utility
15Cited by
7References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2003 |
| Grant date | May 30, 2006 |
| Priority date | — |
| Expiry date | May 12, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bus interface unit is adapted to receive transaction requests for at least two different targets. The bus interface unit monitors a capacity of a resource associated with servicing transaction requests to the targets, such as a posted write buffer. If a transaction request would fill the resource beyond a current remaining capacity of the resource such that the execution of other pipelined transactions would become stalled, the bus interface generates a retry response so that the request is retried at a later time, permitting other transactions to proceed while the resource drains.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.