Method and apparatus for maintaining secure and nonsecure data in a shared memory system
US7055038B2 · kind B2 · utility
44Cited by
4References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 7, 2001 |
| Grant date | May 30, 2006 |
| Priority date | — |
| Expiry date | Aug 19, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/426
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A graphics processor receives a compressed encrypted video stream. The graphics processor decrypts the compressed encrypted video stream and stores a decrypted version (i.e., a decrypted compressed video stream) in a protected portion of an on-chip or off-chip video memory. The graphics processor then permits processors and other bus masters on the graphics processor to access the on-chip video memory, but conditionally limits access to other bus masters that are located off-chip, such as a central processing unit located off-chip and coupled to the graphics processor via a bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.