System and method for paralleling digital wrapper data streams
US7058090B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2001 |
| Grant date | Jun 6, 2006 |
| Priority date | — |
| Expiry date | Sep 14, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/1611
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A system and method are provided for paralleling data streams in a G.709 network of connected integrated circuits. The system comprises a demultiplexer for receiving a first digital wrapper data stream having a first data rate. The demultiplexer demultiplexes the first data stream into a second plurality of digital wrapper data streams having a second data rate, less than the first data rate. A second plurality of processors each accept a corresponding one of the second plurality of data streams and supply a processed data stream at the second data rate. The demultiplexer receives frame alignment signal bytes in the overhead of every first data stream frame and synchronizes frame alignment signal bytes in each of the second plurality of data streams to the frame alignment signal bytes in the first data stream.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.