Twenty gigabit per second two to one multiplexor
US7058092B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 10, 2002 |
| Grant date | Jun 6, 2006 |
| Priority date | — |
| Expiry date | Oct 7, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/047
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The present invention includes a design for a 20-gigabit per second two to one multiplexor, that uses: first and second input amplifiers that respectively provide output signals by respectively receiving and amplifying first and second ten-gigabit per second input signals; first and second power dividers that each produce two output data streams by respectively splitting the output signals of the first and second input amplifiers; first and second mixers that produce output signals by respectively mixing output signals of the first and second power dividers with a 10 GHz local oscillator signal; a second means for combining signals that produces an output signal by combining the output signal of the second mixer with an output data stream of the second power divider; a T/2 delay line that produces an output signal by delaying the output signal of the second combining means; and an output combiner means that outputs a 20-gigabit per second data stream by combining the output signal of the T/2 delay line with the output signal of the first combining means.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.