Method of manufacturing a nonvolatile semiconductor memory device
US7060559B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2003 |
| Grant date | Jun 13, 2006 |
| Priority date | — |
| Expiry date | Jan 28, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
In a method of manufacturing a semiconductor device having a nonvolatile semiconductor memory element with a two-layered gate structure in which a floating gate and control gate are stacked, a polysilicon layer serving as the floating gate is stacked on a silicon substrate via a tunnel insulating film. Then, the silicon layer, tunnel insulating film, and substrate are selectively etched to form an element isolation trench. A nitride film is formed on the sidewall surface of the silicon layer exposed into the element isolation trench. An oxide film is buried in the element isolation trench. A conductive film serving as the control gate is stacked on the oxide film and silicon layer via an electrode insulating film. The conductive film, electrode insulating film, and silicon layer are selectively etched to form the control gate and floating gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.