Planarization for integrated circuits
US7060633B2 · kind B2 · utility
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5References
6Claims
0Family size
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Key dates
| Filing date | Jul 15, 2002 |
| Grant date | Jun 13, 2006 |
| Priority date | — |
| Expiry date | Aug 26, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/7684
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of planarizing a layer of an integrated circuit. In one embodiment, a liquid film is applied over the layer, using extrusion coating techniques. In another embodiment, the layer itself may be applied as a liquid film, using extrusion techniques.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.