Contact portion of semiconductor device, and thin film transistor array panel for display device including the contact portion
US7061015B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2002 |
| Grant date | Jun 13, 2006 |
| Priority date | — |
| Expiry date | Mar 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A gate wire is formed on a substrate. Next, after forming a gate insulating film, a semiconductor layer and an ohmic contact layer subsequently are formed thereon. Next, a data wire is formed. Next, a passivation layer and an organic insulating film are deposited, and patterned to form contact holes for exposing the drain electrode, the gate pad and the data pad, respectively. Here, the organic insulating film around the contact holes is formed thinner than that in the other portions. Next, the organic insulating film around the contact holes is removed by an ashing process to expose the borderline of the passivation layer in the contact holes, thereby removing an under-cut. Then, a pixel electrode, an assistant gate pad and an assistant data pad respectively connected to the drain electrode, the gate pad and the data pad are formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.