Patent · US Expired

System for highly linear phase modulation

US7061341B1 · kind B1 · utility

4Cited by
1References
8Claims
0Family size

Assignee

Inventor

Key dates

Filing dateJun 26, 2004
Grant dateJun 13, 2006
Priority date
Expiry dateJun 26, 2024

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L27/2042
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

System for highly linear phase modulation. Apparatus is provided for linear phase modulation utilizing a phase-locked loop (PLL). The apparatus includes a PLL utilizing fractional N synthesis to realize a non-integer divide value. A two-port voltage-controlled oscillator includes a first port controlled by the phase-locked loop and a second port accessed for direct modulation. A second input to the fractional-N phase-locked loop is provided to remove the modulation introduced at the second port. Lastly, a calibration loop is provided wherein a frequency offset applied at the second port is adjusted until it cancels the effects of a known frequency offset introduced to the fractional-N phase-locked loop.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.