Multi-layer printed circuit board fabrication system and method
US7062354B2 · kind B2 · utility
9Cited by
10References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 6, 2001 |
| Grant date | Jun 13, 2006 |
| Priority date | — |
| Expiry date | Jul 11, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09918
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for aligning an image to be recorded by a direct image scanner on an upper layer of a printed circuit board with an image recorded on a lower layer thereof, the method comprising visually imaging a portion of the image on the lower layer and recording a pattern on the upper layer, referenced to coordinates of the visual image of the portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.