Electrostatic discharge protection structures having high holding current for latch-up immunity
US7064393B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 20, 2004 |
| Grant date | Jun 20, 2006 |
| Priority date | — |
| Expiry date | May 8, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/921
Abstract
An electrostatic discharge (ESD) protection device having high holding current for latch-up immunity. The ESD protection circuit is formed in a semiconductor integrated circuit (IC) having protected circuitry. The ESD protection device includes a silicon controlled rectifier (SCR) coupled between a protected supply line of the IC and ground. A trigger device is coupled from the supply line to a first gate of the SCR, and a first substrate resistor is coupled between the first gate and ground. A first shunt resistor is coupled between the first gate and ground, wherein the shunt resistor has a resistance value lower than the substrate resistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.