Arbiters with preferential enables for asynchronous circuits
US7064583B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2004 |
| Grant date | Jun 20, 2006 |
| Priority date | — |
| Expiry date | Dec 7, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356147
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention provides a circuit that preferentially grants requests. This circuit monitors at least two inputs for request signals and at least two inputs for enable signals, wherein each request signal is associated with a corresponding enable signal. If any enable signal is asserted and only one request signal is asserted, the circuit asserts a grant signal associated with the asserted request signal. Otherwise, if a single enable signal is asserted and multiple request signals are asserted, the circuit preferentially asserts the grant signal of the request signal associated with the asserted enable signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.