Coarse tuning for fractional-N synthesizers
US7064591B1 · kind B1 · utility
15Cited by
22References
32Claims
0Family size
Assignee
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Key dates
| Filing date | Jul 29, 2004 |
| Grant date | Jun 20, 2006 |
| Priority date | — |
| Expiry date | Sep 14, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03J2200/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An improved coarse tuning process for fractional-N frequency synthesizers is provided. In general, a coarse tuning circuit controls a phase lock loop (PLL) of a frequency synthesizer such that the phase lock loop operates in an integer division mode during coarse tuning, thereby eliminating jitter due to fractional-N operation during coarse tuning. The coarse tuning circuit includes divide value generation circuitry that provides an integer divide value to an N divider of the PLL during coarse tuning and a fractional-N sequence to the N divider during fractional-N operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.