Semiconductor device and display device
US7068076B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 29, 2002 |
| Grant date | Jun 27, 2006 |
| Priority date | — |
| Expiry date | Jul 29, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/027
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit capable of reducing a consumption current is provided for a digital display device composed of unipolar TFTs. There is provided a latch circuit for holding a digital video signal. According to the latch circuit, when the digital video signal is inputted to an input electrode of a TFT (101), a non-inverting output signal is outputted from an output electrode of the TFT (101) and an inverting output signal is outputted from output electrodes of TFTs (102 and 103). Two line outputs of non-inversion and inversion are obtained. Thus, when a buffer located in a subsequent stage is operated, a period for which a direct current path is produced between a high potential and a low potential of a power source can be shortened, thereby contributing to reduction in a consumption current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.