Power amplifier utilizing high breakdown voltage circuit topology
US7068104B2 · kind B2 · utility
24Cited by
4References
36Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2004 |
| Grant date | Jun 27, 2006 |
| Priority date | — |
| Expiry date | Jul 8, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/541
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power amplifier utilizes cascode arrangements to achieve target performance levels for a power amplifier, such as the type used in wireless communication devices. A negative resistance circuit is provided for the cascode arrangement such that high gain, or oscillation, is promoted during operation of the power amplifier. In one embodiment, the negative resistance circuit includes cross-coupling transistors. Various features are provided in order to reduce the susceptibility of the power amplifier to voltage breakdown while maintaining good performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.