Methods and circuit for suppressing transients in an output driver and data conversion systems using the same
US7068200B1 · kind B1 · utility
3Cited by
9References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2004 |
| Grant date | Jun 27, 2006 |
| Priority date | — |
| Expiry date | Jun 15, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/66
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A driver circuit with power-down transient suppression includes an amplifier for driving a load coupled to an output of the amplifier, a ramp-down voltage generator having a capacitor and a resistor for generating a ramp-down voltage during power-down of the amplifier, and a differential transistor pair responsive to the ramp-down voltage for pulling-down current at the output of the amplifier during power-down of the amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.