Power efficient booth recoded multiplier and method of multiplication
US7069290B2 · kind B2 · utility
4Cited by
4References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 6, 2002 |
| Grant date | Jun 27, 2006 |
| Priority date | — |
| Expiry date | Dec 14, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/5338
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In the multiplier, a partial product circuit generates a partial product based on a multiplicand operand and outputs of a Booth recoder circuit, which operates on a multiplier operand. The partial product circuit ANDs the multiplicand with a zero Booth recoded output, which indicates whether to zero out the multiplicand. An enable circuit selectively enables the multiplier circuit, and more particularly, disables the multiplier circuit by making the zero Booth recoded output indicate to zero out the multiplicand.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.