System for addressing a data storage unit used in a computer
US7069409B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 25, 2001 |
| Grant date | Jun 27, 2006 |
| Priority date | — |
| Expiry date | Jun 7, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/064
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a system, which divides a memory into a plurality of equally-sized sub-memories and controls an address of each sub-memory, thereby significantly increasing the access speed to an auxiliary memory unit, which includes a SCSI (Small Computer System Interface) controller for converting a format of data on a SCSI interface bus so that the data are accessed on a PCI(Peripheral Component Interconnect) interface bus for use in the system, a memory card module for storing data on the PCI interface bus therein, the memory card module being divided into a plurality of equally-sized memory blocks, and a CPU (Central Processing Unit) module for writing data on the PCI interface bus to the memory card module and reading out the data therefrom. The memory card module includes a PCI-to-memory controller, which is disposed between the PCI interface bus and the plurality of sub-memories as a bridge, for controlling access to the plurality of sub-memories, which is distributed in a hierarchical fashion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.