Fabrication method for organic semiconductor transistor having organic polymeric gate insulating layer
US7071123B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2001 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Nov 5, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K85/615
Abstract
Provided is a method for fabricating an organic semiconductor transistor having an organic polymeric gate insulating layer. The method includes forming an organic gate insulating layer on a substrate by a vapor deposition method using organic monomer sources, and causing a polymerization reaction to occur in the organic gate insulating layer to complete an organic polymeric gate insulating layer. Since the vapor deposition method, which is a low-temperature dry-type technique, is employed, the organic polymeric gate insulating layer can be uniformly formed on a large-area substrate by a simplified in-situ process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.