Programmable voltage regulator configurable for double power density and reverse blocking
US7071664B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2004 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Feb 17, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02J7/00712
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A programmable voltage regulator configurable for reverse blocking and double power density is disclosed herein. The programmable voltage regulator includes an error amplifier that couples to receive a reference voltage. A first NMOS pass transistor connects between an auxiliary voltage input node and the output terminal of the voltage regulator, wherein the first NMOS pass transistor is biased by the output of the error amplifier. Connected between the source of the first NMOS pass transistor and the second input of the error amplifier, a feedback network provides feedback for the voltage regulator. A second NMOS pass transistor connects between the first power supply and the auxiliary voltage input node. Furthermore, an independent node control circuit biases the second NMOS pass transistor such that in a first mode of operation, a first control signal input is operable to receive a signal for controlling the second NMOS pass transistor during reverse battery condition. In a second mode of operation, independent node control circuit includes a second control signal input that is operable to couple to the output terminal of the error amplifier while simultaneously the first power …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.