Digital memory-based predistortion technique
US7071777B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2004 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Dec 28, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2201/3224
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a system and a method for memory-based predistortion to reduce the distortion effects introduced by a power amplifier. The distortion effects include both memoryless and memory effects. The input and the corresponding output values of the power amplifier are measured to determine models used for predistortion. Using these models, first, an amplitude memory signal representing the amplitude memory effects of the power amplifier is obtained. Then, the amplitude memory signal is subtracted from the input signal. On the resulting signal, memoryless amplitude predistortion and memory-based phase predistortion are performed to get a predistorted signal. Further, an inverse model of the linear response of the power amplifier is implemented on the predistorted signal. Finally, the output of the inverse model is amplified by the power amplifier to obtain an output signal having reduced memoryless and memory-based effects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.