High-speed low-power dynamic current biased operational amplifier
US7071778B2 · kind B2 · utility
7Cited by
13References
45Claims
0Family size
Assignees
Inventor
Key dates
| Filing date | Mar 18, 2004 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Apr 27, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/45632
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high-speed low-power dynamic current biased operational amplifier (Op-amp) for use in switched capacitor circuits. The system and method reduces current in the reset process of the switched capacitor circuit's operation, while maintaining the drive current required for fast settling in the amplification process. The system and method significantly lowers the power consumption of the switched capacitor circuit, while overcoming the main issues related to dynamic current biasing in an Op-amp, common-mode feedback interaction, using architecture other than the standard differential input stage of a normal Op-amp.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.