Method and system for a glitch-free differential current steering switch circuit for high speed, high resolution digital-to-analog conversion
US7071858B2 · kind B2 · utility
16Cited by
8References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 30, 2005 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Jun 30, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/742
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Provided are a method and system for reducing glitch in a switch circuit. A system includes a current-steering switch circuit including a main differential pair switch coupled to a first tail current having a first current value. Also included is an auxiliary differential pair switch connected to the main differential pair switch. The auxiliary differential pair switch is coupled to a second tail current and configured to substantially reduce a feed-through current associated with the main differential pair switch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.