Adaptive relative and absolute address coding CMOS imager technique and system architecture
US7071982B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2002 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Feb 13, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/772
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An imaging architecture is provided employing CMOS imaging sensors. The imaging architecture utilizes time domain sampling techniques to extract image data from a photodiode (PD) pixel array. The CMOS imaging architecture associates time index values with firing of CMOS imaging sensors in response to a capture of an image. The time index values correspond to the brightness of the illumination received by the CMOS imaging sensor. The time index value associated with the firing of the CMOS imaging sensor can be stored and employed in reconstruction of the image. The imaging architecture includes systems and methods for reading and compressing imaging data extracted from the PD pixel array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.