Apparatus for optimizing processor clock frequency in a hard disk drive to minimize power consumption while maximizing performance
US7072138B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 14, 2003 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Aug 2, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B21/083
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Clock speed of the processor in a hard disk drive is controlled during run time to optimize the trade-off between minimizing power consumption and maximizing performance. Processor clock speed is increased during processing of code more performance critical to the disk drive system, while processor clock speed is reduced when less performance critical code is processed. An example of more critical code where processor clock speed is increased is the code executed by the processor from the start of a servo interrupt until output of resulting servo current command is provided from the processor to the actuator controller. To enable changing processor clock speed, an ASIC containing the disk drive processor is selected which provides the ability to switch clock rates of the processor during processor run time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.