Method for analyzing data storage system test data
US7072787B1 · kind B1 · utility
1Cited by
6References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 1, 2004 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Sep 1, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/321
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for testing each one of the CPUs on each one of the plurality of director printed circuit. Results from such test are collected in a memory of a computer. The results are collected in a predetermined format. The method processes the collected data to present the results of the tests on a display of the computer in a different format. The different format comprises lines of information on the computer display. Each one of the lines of information identifies a corresponding one of the CPUs and indicates whether such corresponding one of the CPUs passed or failed the testing thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.