Method and system for debugging an electronic system
US7072818B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2000 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Mar 5, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Techniques and systems for debugging an electronic system having instrumentation circuitry included therein are disclosed. The techniques and systems facilitate analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the invention enables the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.