Fault-tolerant digital communications channel having synchronized unidirectional links
US7073001B1 · kind B1 · utility
11Cited by
10References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 3, 2002 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Sep 7, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4291
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of synchronizing or initiating channel lock in a serial loop formed by an initializing transceiver and subject transceivers disclosed. Should a transceiver in the serial loop detect that its receiving serial channel is desynchronized, it sends an unlock signal to the next transceiver in the loop. The unlock signal guarantees that the next transceiver's receiving serial channel will be desynchronized. Only the initializing transceiver may initiate a channel lock sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.