Semiconductor device and its manufacturing method

US7075149B2 · kind B2 · utility

Assignee

• Kabushiki Kaisha Toshiba · JP

Inventors

• Shingo Sato · Kariya, JP
• Atsuko Yamashita · Himeji, JP
• Hideki Okumura · Yokohama, JP
• Kenichi Tokano · Kawasaki, JP

Key dates

• Filing date: May 13, 2004
• Grant date: Jul 11, 2006
• Expiry date: May 13, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/393

Abstract

A semiconductor device comprises: a semiconductor layer of a first conductivity type; a first semiconductor pillar layer of the first conductivity type; a second semiconductor pillar layer of a second conductivity type; a third semiconductor pillar layer of the first conductivity type; a forth semiconductor pillar layer of the second conductivity type; a fifth semiconductor pillar layer of the first conductivity type provided on the major surface of the semiconductor layer; a first semiconductor base layer of the second conductivity type provided on the second semiconductor pillar layer; a second semiconductor base layer of the second conductivity type provided on the forth semiconductor pillar layer; first semiconductor region of the first conductivity type selectively provided on a surface of the first semiconductor base layer; second semiconductor region of the first conductivity type selectively provided on a surface of the second semiconductor base layer; gate insulating film provided on the first semiconductor base layer between the first semiconductor region and the first semiconductor pillar layer and between the first semiconductor region and the third semiconductor pillar…