Methods and systems for providing hardware assisted programming of a programmable logic device in an embedded system
US7075331B2 · kind B2 · utility
18Cited by
4References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 3, 2004 |
| Grant date | Jul 11, 2006 |
| Priority date | — |
| Expiry date | Jun 3, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable logic device (PLD) in a microprocessor system is programmed with minimal load on system resources. A microprocessor reads programming data from a first memory using a parallel bussed interface and writes the programming data to a programming hardware assist engine using the parallel bussed interface. The programming hardware assist engine directs a portion of the programming data to a specified serial interface signal, and outputs a serial bit stream from the programming hardware assist engine to a serial programming interface of the PLD using the specified serial interface signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.