Dynamic multi-input priority multiplexer
US7075354B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 14, 2004 |
| Grant date | Jul 11, 2006 |
| Priority date | — |
| Expiry date | Jul 27, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/693
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A dynamic priority multiplexer including a complementary pair of evaluation devices responsive to a clock signal defining evaluation periods, and multiple evaluation legs coupled in cascade between a top node and a bottom node and arranged in order of priority. The complementary pair includes a pull-up device that pre-charges the top node and a pull-down device that pulls the bottom node low during evaluation. Each higher priority evaluation leg receives a corresponding select signal and a corresponding data signal and includes a corresponding pass device. A select signal, when asserted, enables evaluation of a corresponding data signal and disables a corresponding pass device. The lowest priority evaluation leg includes a pull-down data device that receives a lowest priority data signal and which is coupled between a pass device of a higher priority evaluation leg and the bottom node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.