Circuit and method for performing a two-dimensional transform during the processing of an image
US7076105B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 12, 2001 |
| Grant date | Jul 11, 2006 |
| Priority date | — |
| Expiry date | Dec 2, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/60
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An image decoder performs a 2-D transform as a series of 1-D transforms, and does so in a more efficient manner than prior decoders. The decoder includes a memory and a processor coupled to the memory. The processor is operable to store a column of values in the memory as a row of values, combine the values within the stored row to generate a column of resulting values, and store the resulting values in the memory as a row of resulting values. Such an image decoder can store values in a memory register such that when the processor combines these values to generate intermediate IDCT values, it stores these intermediate IDCT values in a transposed fashion. Thus, such an image decoder reduces the image-processing time by combining the generating and transposing of the intermediate IDCT values into a single step. The image decoder can store the values in a memory register such that when the processor combines these values to generate the intermediate IDCT values, it stores these intermediate IDCT values in a transposed and even-odd-separated fashion. Thus, such an image decoder reduces the image-processing time by combining the generating, transposing, and even-odd separating of the in…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.