Broadcast invalidate scheme
US7076597B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 14, 2003 |
| Grant date | Jul 11, 2006 |
| Priority date | — |
| Expiry date | Nov 12, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0826
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A directory-based multiprocessor cache control scheme for distributing invalidate messages to change the state of shared data in a computer system. The plurality of processors are grouped into a plurality of clusters. A directory controller tracks copies of shared data sent to processors in the clusters. Upon receiving an exclusive request from a processor requesting permission to modify a shared copy of the data, the directory controller generates invalidate messages requesting that other processors sharing the same data invalidate that data. These invalidate messages are sent via a point-to-point transmission only to master processors in clusters actually containing a shared copy of the data. Upon receiving the invalidate message, the master processors broadcast the invalidate message in an ordered fan-in/fan-out process to each processor in the cluster. All processors within the cluster invalidate a local copy of the shared data if it exists and once the master processor receives acknowledgements from all processors in the cluster, the master processor sends an invalidate acknowledgment message to the processor that originally requested the exclusive rights to the shared data. T…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.