Pipeline accessing method to a large block memory
US7076598B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 9, 2003 |
| Grant date | Jul 11, 2006 |
| Priority date | — |
| Expiry date | Jun 2, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A pipeline accessing method to a large block memory is described. The large block flash memory has a plurality of pages and each page has a plurality of sectors. The memory device has a controller to control an access operation between a host and a cell array of the large block flash memory with a page buffer. The controller includes at least two buffers, when the host intends to program the memory device. In the method, data sectors are transferred between the host and the large block flash memory by alternatively using the buffers. After transferring N data sectors with respect to one page, a start program command is issued by the controller for programming the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.