Automatic testing of microprocessor bus integrity
US7076711B1 · kind B1 · utility
2Cited by
12References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2002 |
| Grant date | Jul 11, 2006 |
| Priority date | — |
| Expiry date | Jun 10, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/27
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Integrated circuit bus integrity may be verified without specialized test equipment. In a diagnostic mode, the integrated circuit may output a series of predetermined activation patterns onto the data bus to verify integrity of the data bus. Further bus verification may be provided by an address capture mode where address bus contents are reflected onto the data bus. A microprocessor may control diagnostic mode operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.